| 2025-06-06 | Awarded the VeTSS PhD award. |
| 2025-02-13 | Gave a talk about formalising rewrites on dataflow circuits at SVD'25. |
| 2024-09-05 | Visiting Sandrine Blazy and Delphine Demange in Rennes. |
| 2024-06-26 | Presented our paper on verified hyperblock scheduling at PLDI'24. |
| 2024-06-19 | Gave a talk at the Cambridge Compiler Social. |
| 2024-04-19 | Defended my PhD thesis in front of Xavier Leroy and George Constantinides. |
| 2024-02-13 | Submitted my PhD thesis. |
| 2024-01-14 | Attended POPL'24 in London. |
| 2023-12-01 | Started as a postdoc with Thomas Bourgeat in the VCA lab. |
| 2023-01-16 | Presented our CPP'23 paper in Boston. |
| 2022-12-19 | Internship at Amazon in the Prime Video Automated Reasoning Group. |
| 2022-10-31 | Present verified GSA semantics at CAS Group. |
| 2022-08-12 | Talk at the Concurrency Meeting 2022 about Formalising Predicated Execution. |
| 2022-06-28 | Program Committee for PERR'22. |
| 2022-06-17 | Presented the OOPSLA'21 paper at PLDI'22. |
| 2022-05-18 | Invited talk at the FLASHLIGHT workshop at FCCM'22. |
| 2022-03-04 | Artefact evaluation for PLDI'22. |
| 2022-02-24 | Invited talk at PEQ'22. |
| 2022-02-07 | Subreviewer for FCCM'22. |
| 2021-11-24 | Artifact evaluation for CGO'22. |
| 2021-11-22 | Present hyperblock scheduling at CAS Group. |
| 2021-09-16 | Present Vericert at the Formal Methods group at Chalmers. |
| 2021-08-31 | Paper on Vericert accepted at OOPSLA'21. |
| 2021-05-31 | Internship with Sandrine Blazy and Delphine Demange on CompCertSSA. |
| 2021-02-05 | Invited seminar talk for the Celtique project. |
| 2020-12-07 | Present Vericert in front of CAS Group. |
| 2020-09-10 | Artifact review committee at OOPSLA 2020. |
| 2020-06-17 | Gold medal at PLDI 2020 SRC Presentation. |
| 2020-06-15 | Student volunteer at PLDI 2020. |
| 2020-02-25 | Presented Verismith at FPGA 2020. |
| 2020-02-03 | Presented Verismith in front of CAS Group. |
| 2019-12-15 | FPGA 2020 Verismith paper accepted. |
| 2019-10-03 | Started PhD at Imperial College London with John Wickerson. |
| 2019-09-15 | Submitted Verismith paper to FPGA 2020. |
| 2019-07-15 | Student volunteer at ECOOP 2019. |
| 2019-07-01 | Present fuzzing Verilog for CAS Group. |