Hi! I’m currently a PhD student in the Circuits and Systems group at Imperial College London, supervised by John Wickerson.
My research focuses on formalising the process of converting high-level programming language descriptions to correct hardware that is functionally equivalent to the input. This process is called high-level synthesis (HLS), and allows software to be turned into custom accelerators automatically, which can then be placed on field-programmable gate arrays (FPGAs). An implementation in the Coq theorem prover called Vericert can be found on Github.
I have also worked on random testing for FPGA synthesis tools. Verismith is a fuzzer that will randomly generate a Verilog design, pass it to the synthesis tool, and use an equivalence check to compare the output to the input. If these differ, the design is automatically reduced until the bug is located.
Publications
- FCCM '22
- Michalis Pardalos, Yann Herklotz, and John Wickerson.
Resource sharing for verified high-level synthesis.
In 30th IEEE Annual Int. Symp. on Field-Programmable Custom
Computing Machines (FCCM), 2022.
Short paper.
[ DOI | artifact | pdf ] - OOPSLA '21
- Yann Herklotz, James D. Pollard, Nadesh Ramanathan, and John Wickerson.
Formal verification of high-level synthesis.
Proc. of the ACM on Programming Languages, (OOPSLA), 2021.
[ DOI | artifact | blog | changelog | pdf | poster | slides | video ] - FCCM '21
- Yann Herklotz, Zewei Du, Nadesh Ramanathan, and John Wickerson.
An empirical study of the reliability of high-level synthesis tools.
In 29th IEEE Annual Int. Symp. on Field-Programmable Custom
Computing Machines (FCCM), 2021.
Short paper.
[ DOI | artifact | pdf ] - FPGA '20
- Yann Herklotz and John Wickerson.
Finding and understanding bugs in FPGA synthesis tools.
In ACM/SIGDA Int. Symp. on Field-Programmable Gate Arrays
(FPGA), 2020.
[ DOI | artifact | blog | pdf | poster | slides ]
Other Papers and Posters
- LATTE '21
- Yann Herklotz and John Wickerson.
High-level synthesis tools should be proven correct.
In Workshop on Languages, Tools, and Techniques for Accelerator
Design, 2021.
[ pdf | video ] - FPGA '21
- Zewei Du, Yann Herklotz, Nadesh Ramanathan, and John Wickerson.
Fuzzing high-level synthesis tools.
In ACM/SIGDA Int. Symp. on Field-Programmable Gate Arrays,
2021.
[ DOI | slides ]
Blog
Service
| Program Committee | PERR'22 |
| Artefact Evaluation | PLDI'22 , CGO'22 , OOPSLA'20 |
| Subreviewer | FCCM'22 , OOPSLA'21 , FCCM'20 |
News
| 2022-08-12 | Talk at the Concurrency Meeting 2022 about Formalising Predicated Execution. |
| 2022-06-28 | Program Committee for PERR'22. |
| 2022-06-17 | Presented the OOPSLA'21 paper at PLDI'22. |
| 2022-05-18 | Invited talk at the FLASHLIGHT workshop at FCCM'22. |
| 2022-03-04 | Artefact evaluation for PLDI'22. |
| 2022-02-24 | Invited talk at PEQ'22. |
| 2022-02-07 | Subreviewer for FCCM'22. |
| 2021-11-24 | Artifact evaluation for CGO'22. |
| 2021-11-22 | Present hyperblock scheduling at CAS Group. |
| 2021-09-16 | Present Vericert at the Formal Methods group at Chalmers. |
| more... |