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Hi! I’m currently a first year PhD student in the Circuits and Systems group at Imperial College London, supervised by John Wickerson.

My research focuses on formalising the process of converting high-level programming language descriptions to correct hardware that is functionally equivalent to the input. This process is called high-level synthesis (HLS), and allows software to be turned into custom accelerators automatically, which can then be placed on field-programmable gate arrays (FPGAs).

I have also worked on random testing for FPGA synthesis tools. Verismith is a fuzzer that will randomly generate a Verilog design, pass it to the synthesis tool, and use an equivalence check to compare the output to the input. If these differ, the design is automatically reduced until the bug is located.

News

2020-09-10Artifact review committee at OOPSLA 2020.
2020-06-17Gold medal at PLDI 2020 SRC Presentation.
2020-06-15Student volunteer at PLDI 2020.
2019-12-15FPGA 2020 Verismith paper accepted.
2019-07-15Student volunteer at ECOOP 2019.

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Publications

FPGA '20
Yann Herklotz and John Wickerson. Finding and understanding bugs in FPGA synthesis tools. In ACM/SIGDA Int. Symp. on Field-Programmable Gate Arrays, 2020.
DOI | artifact | blog | pdf | poster | slides ]

Blog

Nix for Coq Development
Nix is a great package manager that can be used to control various complex environments easily, such as Coq development with ocaml extraction with various dependencies.
MSR PhD Workshop on Next-Generation Cloud Infrastructure
Summary of the microsoft talks and posters presented at the MSR PhD Workshop on Next-Generation Cloud Infrastructure.
Verismith
Verilog Fuzzer to test the major verilog compilers by generating random, valid Verilog.
Realistic Graphics
Environment maps can be used to render objects with realistic lighting by indexing into the map.
Jekyll to create a Portfolio website
Jekyll can be effectively used to publish a static website, even containing multiple pages such as a portfolio.

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